来源于：內容由半导体行业观察（ID：icbank）编译程序自「tomshardware」，感谢。

根据将 6,000 个 RISC-V SERV 内核与赛灵思最强有力的 FPGA 设计方案之一 的VCU128 板匹配开发设计，竞争力指数者完成了RISC-V 内核最聚集分布的新世界记录（由CoreScore 标准检测精确测量）。该标准检测仿真模拟了能够在片式单晶硅片上布署多少个 SERV 内核，而赛灵思的 Virtex UltraScale VCU128 FPGA根据其內部重新部署能够承载高达 6,000 个 SERV 内核。以前的纪录世界记录一共有 5,087 个内核代管在 Xilinx 的 VCU118 上。

FPGA（当场可编程控制器门阵列）是一种独特的硬件配置，由于他们具备极少的固定不动作用元器件。反过来，他们被搭建为能够在运转中（或在现场）程序编写，效仿程序猿界定的晶体三极管排序。这大部分容许 FPGA 变成 人们最贴近响应式解决电子产品的商品，依据手头上的工作中负荷随时随地转变（这是一个简单化的表述）。

“当您有着屡获荣誉的 SERV，世界上最小的 RISC-V CPU 时，您会干什么？” SERV 关键和 CoreScore 标准检测的设计师 Olof Kindgren 询问道。“嗯，此外，大家自然想看看您能够在多种机器设备中安裝多少个 SERV 内核。这就是 CoreScore 的主要用途。在现阶段 30 块板的文件列表中，大家现在可以寻找 Sylvain Lefebvre及其合适 6000 个 SERV 内核的 Xilinx VCU128 板。”

这种内核并不是您一般在Intel 或 AMD 的最好手机游戏 CPU上寻找的内核；他们是简化的、准系统的位串行通信工作中模块，包括尽量少的不相干作用。这类方式最大限度地降低了每一个内核占有的总集成ic室内空间。该设计方案根据工作中负荷并行处理化来完成特性，而不是来源于每一个关键的显著解决。

“大家已经贴近最高值，”Lefebvre 在谈起他的 6,000 核纪录时表示，“应用 VCU128 FPGA 的 98.5% LUT[搜索表]（和 100% BRAM[块 RAM]）。与 Olof Kindgren 协作十分有意思在这里一点上，这也是对大家 Xilinx VCU128 的极致详细介绍。”

附：原文

A new world record for the densest arrangement of RISC-V cores (measured by the CoreScore benchmark) has been achieved by pairing 6,000 RISC-V SERV cores and one of Xilinx's most powerful FPGA designs, the VCU128 board. The benchmark simulates how many SERV cores can be deployed on a single piece of silicon, and the Xilinx's Virtex UltraScale VCU128 FPGA can fit as many as 6,000 SERV cores via its internal reconfiguration. The previous record-holder had a total of 5,087 cores hosted on Xilinx's VCU118.

FPGAs (Field-Programmable Gate Array) are exotic pieces of hardware because they have very few fixed-function elements. Instead, they are built to be programmable on the fly (or in the field), mimicking transistor arrangements defined by the programmer. This essentially allows FPGAs to be the closest we have to adaptive processing electronics, changing from moment to moment according to the workload at hand (this is a simplified explanation).

"What do you do when you have the award-winning SERV, the world's smallest RISC-V CPU?" asks Olof Kindgren, designer of both the SERV core and the CoreScore benchmark. "Well, among other things, we, of course, want to see how many SERV cores you can fit into various devices. This is what CoreScore is for. And on top of that list of currently 30 boards, we can now find Sylvain Lefebvre and his Xilinx VCU128 board that fits 6000 SERV cores."

These cores aren't what you'd typically find on your best CPUs for gaming from Intel or AMD; they are stripped-down, barebones bit-serial work units that include as few extraneous functions as possible. That approach minimizes the total die space occupied by each core. The design achieves performance via workload parallelization, not from the obvious processing grunt from each core.

"We are nearing the max," Lefebvre says of his 6,000-core record, "with 98.5% LUTs[Lookup Tables](and 100% BRAM[Block RAM]) of the VCU128 FPGA utilized. It's been great fun working with Olof Kindgren on this, and it was a perfect intro to our Xilinx VCU128 monster."

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